Connection/reference device
ADA2200
Synchronous demodulator and configurable analog filter
AD7192
4.8 kHz, ultra low noise, 24-bit Σ-Δ ADC with built-in PGA
ADG794
Low-Voltage, 300 MHz, Quad 2:1 Multiplexed Analog HDTV Audio/Video Switch
ADP151
Ultra Low Noise, 200 mA CMOS Linear Regulator
Circuit function and advantage
The circuit shown in Figure 1 is a complete linear variable differential transformer (LVDT) signal conditioning circuit that accurately measures the linear or linear displacement from a mechanical reference point. Synchronous demodulation in the analog domain is used to extract position information and suppress external noise. A 24-bit, sigma-delta analog-to-digital converter (ADC) digitizes positional output for high accuracy.
The LVDT uses electromagnetic coupling between the active core and the coil assembly. This non-contact (and therefore frictionless) approach is widely used in aerospace, process control, robotics, nuclear, chemical plants, hydraulics, power turbines and other harsh working environments and requires long working life and high reliability. The main reason for sexual application.
The entire circuit, including the LVDT excitation signal, consumes only 10 mW. The circuit excitation frequency and output data rate are both SPI programmable. The system allows for trade-offs between programmable bandwidth and dynamic range, supports bandwidths above 1 kHz, and has a 100 dB dynamic range at 20 Hz bandwidth, making it ideal for precision industrial location and metrology applications.
Figure 1. LVDT Signal Conditioning Circuit (Simplified Schematic: All Connections and Decoupling Not Shown)
Circuit description
The ADA2200 synchronous demodulator filters the LVDT secondary signal before the signal is demodulated to a low frequency output voltage proportional to the LVDT core displacement to extract position information. The ADA2200 drives the AD7192 24-bit Σ-Δ ADC, which digitizes and filters the output. The ADA2200 generates a synchronous LVDT excitation signal, while the ADG794 switch converts the CMOS level excitation signal into a precision 3.3 V square wave signal that drives the LVDT primary winding.
The LVDT is an absolute displacement sensor that converts linear displacement into a proportional electrical signal. The LVDT is a special winding transformer with an active core that fits the position to be tested. An excitation signal is applied to the primary winding. As the core moves, the voltage on the secondary winding changes proportionally; the position can be calculated from this voltage.
There are many types of LVDTs, and the methods for extracting location information are also different. The circuit in Figure 1 uses a 4-wire mode LVDT. The secondary outputs of the two LVDTs are connected in opposite voltages to perform subtraction. When the LVDT core is at the zero position, the voltages on the two secondary ends are equal and the voltage difference across the two windings is zero. As the core moves from the zero position, the voltage difference across the secondary winding increases. The LVDT output voltage phase changes depending on the direction.
The main clock of this circuit is generated by the AD7192 ADC. The ADA2200 accepts the main clock and generates all its internal clocks, including the reference clock used as the LVDT excitation signal. The clock divider on the ADA2200 is configured to generate a 4.8 kHz excitation signal. The ADG794 converts the excitation signal into a precision ±3.3 V square wave signal, which is derived from the ADC supply voltage. The 3.3 V supply is also used as the ADC reference; therefore, the proportional relationship between the excitation signal and the ADC reference voltage improves the noise performance and stability of the circuit. The system's 3.3 V supply is provided by the ADP151 low dropout regulator; the latter is driven by a 5 V supply.
A coupling circuit between the LVDT secondary winding and the ADA2200 input is used to limit the signal bandwidth and adjust the relative phase between the RCLK and ADA2200 inputs. The circuit is configured to have a maximum quadrature (phase = 90°) response and a minimum in-phase (phase = 0°) response. This makes it possible to determine the position simply by measuring the quadrature output, which in turn makes the ADA2200 output voltage less sensitive to phase changes in the circuit. Temperature changes in the LVDT result in changes in effective series resistance and inductance, which are the main sources of phase change.
The anti-aliasing filter at the output of the ADA2200 maintains the signal bandwidth supported by the ADC. The output bandwidth of the AD7192 internal digital filter is approximately equal to 0.27 times the output data rate. To maintain the output bandwidth at the maximum output data rate of 4.8 kHz, the -3 dB corner frequency of the output anti-aliasing filter can be set to around 2 kHz. For systems that require a lower output data rate, the corner frequency of the anti-aliasing filter can be reduced accordingly.
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