Linear Technology Introduces Ultra Low Power Analog-to-Digital Converter (ADC) Series

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Linear Technology Corporation (Linear Technology Corporation) Ultra Low Power Release 14 and 12, 25Msps to 125Msps analog to digital converter (ADC) series LTC2145, each of the series of devices Msps low power consumption when using a single 1.8V supply At 1mW, it makes it the lowest power high speed ADC on the market. The LTC2145 family includes a two-channel simultaneous sampling, parallel output ADC that provides full-speed CMOS, double data rate (DDR) CMOS or DDR LVDS digital output options, as well as programmable digital output timing, programmable LVDS output current, and optional LVDS Output terminal. At 25Msps, the 14-bit and 12-bit versions of the LTC2140 consume only 24mW per channel, while the 125Msps LTC2145 consumes only 95mW per channel. Although it has the lowest power consumption level, its AC performance has not been reduced. At 14-bit resolution, these devices achieve SNR performance above 73.2dB and 90dB SFDR on the baseband. Its SNR performance is better than 70.6dB at 12-bit resolution. The ADC family offers a pin-compatible upgrade path to the ultra-low-power LTC2185 16-bit ADC family to deliver 3dB performance boost and portability in a variety of applications such as handheld test and instrumentation, radar / LIDAR , medical imaging, PET / SPECT scanners, military radios, smart antenna systems, and a variety of low-power communication systems.

Different rate versions are pin compatible and include 25Msps (24mW per channel), 40Msps (33mW per channel), 65Msps (46mW per channel), 80Msps (55mW per channel), 105Msps (75mW per channel) and 125Msps (per channel 95mW). Further power savings can be achieved by placing the device in standby (16mW) or shutdown (1mW) mode. The 750MHz analog full power bandwidth and 0.08ps RMS ultra-low jitter allow for undersampling of the IF frequency with superior noise performance. These devices feature Linear Technology's digital output random function generator and alternating bit polarity (ABP) mode features designed to reduce digital feedback.

Available in a compact 9mm x 9mm QFN package, these devices offer the flexibility to interface to minimize pin count and ease the wiring burden on the FPGA. These ADCs will be available in production quantities starting in May and June of this year, and demonstration boards and samples are available through Linearl's offices. The dual-channel 12-bit 25Msps device is priced at $10.95 each in 1,000-piece quantities. For a complete product line, visit